Join Us Where You Are Valued,
SkyeChip takes pride in competing at the global level with our IPs and IC products. There are endless opportunities at SkyeChip for our employees to explore, grow and excel. It is about working for a company where you are most valued, challenged and inspired in your job.
Every Experience Level is Welcome!
We provide growth opportunity for all
No matter what your starting positions, we are committed to help you to reach your full potential and beyond.
New college graduates are encouraged to apply. SkyeChip is the perfect place to launch your career.
Logic Design Engineers
- As a member of our Digital Design team, you will collaborate with architects, software engineers, and circuit designers to and deliver world-class solutions.
- Responsible for the logic and/or verification of the design including RTL design, synthesis, Verification plan, functional verification and timing analysis using leading edge CAD tools and using the latest process technologies, define the verification strategy and test plan;
- Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, Testbenches, BFMs, Checkers, Monitors, execute test/coverage plans, design verification and debug, and work with Physical DE to achieve your timing, area, performance and power goals.
Circuit Design Engineers
- Work as part of a team to design and implement high speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools.
- High speed analog and hybrid Phase Locked loops and associated subblocks including VCO, charge-pump, dividers, state machines, LDO, bandgap, TDC, interpolator circuits, high speed buffers etc.
- Contribute to architecture development and transistor level circuit design of high performance RX/TX and associated blocks like VREG, comparators, digital state machines for DDR/HBM memory interfaces
- Work closely with mask design engineers to deliver the physical design as well as work with characterization groups for silicon evaluation.
- Perform architecture studies, circuit designs & simulations, floor-planning, instructing mask designers, reliability verifications and silicon bring-up.
Physical Design Engineers
- Responsible for unit/block/chip level RTL to GDSII Physical design activities at block and/or CPU level.
- Collaborate with the microarchitecture and RTL teams to achieve aggressive performance, power, and area (PPA) goals.
- PD activities includes floor plans, global signal planning, Synthesis, Place and Route, Static Timing Analysis, block/chip level integrations.
Custom Layout Engineers
- Perform physical layout for mixed-signal functions like PLL’s, high speed I/O circuits, general I/O’s, ESD structure designs in state-of-the-art sub-micron CMOS technologies using EDA tools.
- You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
- Job duties will include floor planning, custom layout, RC extraction, EM & IR drop, DRC’s & schematic to layout verification.
- Define and develop software architecture to optimize system performance for ASICs, SoCs and FPGAs
- Define and develop system modeling architecture for state-of-the-art memory and interconnect IP architectures
- Define and develop graphical user interface for system level optimizations
- Document and demonstrate solutions by developing documentation, flowcharts, layouts, diagrams, charts, code comments and clear code.
- Determine operational feasibility by evaluating analysis, problem definition, requirements, solution development, and proposed solutions.